Intel Overhauls CPUs: Alder Lake Architecture Explained - New Core, PCIe Gen5, & DDR5
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Date: 2021-08-20
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Comments and reviews: 10
Jacob
On MacOS, it is unlikely we will see any of these hybrid CPUs in a Mac. Apple seems content to wait to refresh until they are ready with their silicon, the last Mac Pro (trash can) sold for a long time and then took a long time again for a replacement. The work to develop a new board for the new CPUs to carry until next year is not worth it to them, plus then they can claim better performance relative to intel because they will be using an older generation.
Because of that, I doubt we will see the core management features be ported to MacOS, maybe by some software engineer/team outside of apple for hackintosh but that's a big maybe. Hopefully it is brought to linux soon, it isn't a huge market but intel has traditionally been decent about Linux support with drivers and the like so I am optimistic.
Great overview of the new CPUs (as always), I am looking forward to the next few years, at least intel is finally doing something new. I am unsure if and when they will catch AMD but I hope they do for the market's sake. Competition is good (for proof see Nvidia's 20 series and it's abysmal gains vs the 30 series and intel insisting that more than 4c/8t wasn't possible on a mainstream socket until AMD did otherwise)
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On MacOS, it is unlikely we will see any of these hybrid CPUs in a Mac. Apple seems content to wait to refresh until they are ready with their silicon, the last Mac Pro (trash can) sold for a long time and then took a long time again for a replacement. The work to develop a new board for the new CPUs to carry until next year is not worth it to them, plus then they can claim better performance relative to intel because they will be using an older generation.
Because of that, I doubt we will see the core management features be ported to MacOS, maybe by some software engineer/team outside of apple for hackintosh but that's a big maybe. Hopefully it is brought to linux soon, it isn't a huge market but intel has traditionally been decent about Linux support with drivers and the like so I am optimistic.
Great overview of the new CPUs (as always), I am looking forward to the next few years, at least intel is finally doing something new. I am unsure if and when they will catch AMD but I hope they do for the market's sake. Competition is good (for proof see Nvidia's 20 series and it's abysmal gains vs the 30 series and intel insisting that more than 4c/8t wasn't possible on a mainstream socket until AMD did otherwise)
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Argensis
No Mac support: Apple has left them, if they ever win Apple back they'll cross that bridge then. And they'd need some sort of earth shattering improvements for that to happen in under 5 years. Even if they were say, 20% better than M1 at the same power usage, I don't think that would be enough for Apple to change course in the short term. Besides, Apple have to have their own go at this kind of scheduling for apple silicon CPUs and have been doing it longer than Intel thanks to their mobile products, so even if that did just happen there's a good chance they'd just use whatever's built into OS X.
No Linux support: Either it means they plan to have their server products to be all E or all P cores, or they weren't able to improve on the already existing scheduling logic in Linux for mixed core types, or we'll hear about it when they start talking about Xeons with this architecture. While they might blow off Linux desktop users, it's inconcievable they'd launch server CPUs with features that don't work on the majority server OS.
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No Mac support: Apple has left them, if they ever win Apple back they'll cross that bridge then. And they'd need some sort of earth shattering improvements for that to happen in under 5 years. Even if they were say, 20% better than M1 at the same power usage, I don't think that would be enough for Apple to change course in the short term. Besides, Apple have to have their own go at this kind of scheduling for apple silicon CPUs and have been doing it longer than Intel thanks to their mobile products, so even if that did just happen there's a good chance they'd just use whatever's built into OS X.
No Linux support: Either it means they plan to have their server products to be all E or all P cores, or they weren't able to improve on the already existing scheduling logic in Linux for mixed core types, or we'll hear about it when they start talking about Xeons with this architecture. While they might blow off Linux desktop users, it's inconcievable they'd launch server CPUs with features that don't work on the majority server OS.
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asmi06
I wish they'd use this opportunity to get rid of a lot of obsolete junk which plagues x86 ISA. It seems like this was one of rare moments when they could actually do that - provide a few full-x86-compatible cores for system to start up with, but then let OS bring up new x86 v2.0 cores which only support 32 and 64 bit modes without all of that historical garbage that is there only for backward compatibility. THIS would be the true innovation, and would probably make those new cores even faster and more efficient (less logic -> faster clock -> less power). And I'm certain AMD would be happy to join this initiative to refresh x86 and bring it more in line with modern times. x86 ISA is seriously hampered by all of that historical crap, and that's why x86 CPUs are so inefficient compared to more modern architectures like ARM and RISC-V.
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I wish they'd use this opportunity to get rid of a lot of obsolete junk which plagues x86 ISA. It seems like this was one of rare moments when they could actually do that - provide a few full-x86-compatible cores for system to start up with, but then let OS bring up new x86 v2.0 cores which only support 32 and 64 bit modes without all of that historical garbage that is there only for backward compatibility. THIS would be the true innovation, and would probably make those new cores even faster and more efficient (less logic -> faster clock -> less power). And I'm certain AMD would be happy to join this initiative to refresh x86 and bring it more in line with modern times. x86 ISA is seriously hampered by all of that historical crap, and that's why x86 CPUs are so inefficient compared to more modern architectures like ARM and RISC-V.
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Chrono
Ah, yes, V-Tech for your computer!
I for one think that the Big.little structure has a lot of promise. Of course, implementation is still key, but mobile CPU's have been seeing a lot of improvement! Intel may be able to successfully translate that to the desktop space.
I am also curious how CPU power delivery will change. Will there be two dedicated phase controllers for the big and little cores? Especially if each cluster will run at different speeds and voltages. Memory is also interesting. Will the increased core cache decrease the need for better RAM, or will RAM become even more important as threads are being transferred between the big and little cores?
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Ah, yes, V-Tech for your computer!
I for one think that the Big.little structure has a lot of promise. Of course, implementation is still key, but mobile CPU's have been seeing a lot of improvement! Intel may be able to successfully translate that to the desktop space.
I am also curious how CPU power delivery will change. Will there be two dedicated phase controllers for the big and little cores? Especially if each cluster will run at different speeds and voltages. Memory is also interesting. Will the increased core cache decrease the need for better RAM, or will RAM become even more important as threads are being transferred between the big and little cores?
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SparkYo
Intel really wants you to lead you into believing the performance of the Efficincy cores will be comparable to skylake, but it's not going to be even remotely close. The E cores are not going to be run at the same or 40% less power compared to skylake. A skylake i5-6600 ran each core at 15W per core (higher for K parts), plus a ton of extra power pumped in during boost.
Intel isn't talking about exactly how much power is available to each efficiency core, but it is likely to be less than 1W per core. You should expect somewhere on the scale of 10% per-core performance vs skylake.
The smoke and mirrors in this presentation makes my skin crawl.
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Intel really wants you to lead you into believing the performance of the Efficincy cores will be comparable to skylake, but it's not going to be even remotely close. The E cores are not going to be run at the same or 40% less power compared to skylake. A skylake i5-6600 ran each core at 15W per core (higher for K parts), plus a ton of extra power pumped in during boost.
Intel isn't talking about exactly how much power is available to each efficiency core, but it is likely to be less than 1W per core. You should expect somewhere on the scale of 10% per-core performance vs skylake.
The smoke and mirrors in this presentation makes my skin crawl.
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Paulus
News Report
The big chip making company, Intel, is in trouble. It has been accused of innovating.
We've interviewed the CEO, who told us We didn't do anything ! Why would we do that ?
Yet there are a lot of evidence that clearly points to Intel trying to innovate.
A complete 180 from their usual ethics, which can be summed up by Avoid any comparison, and remember to don't move: the customer's vision is based on movement .
We will have to wait for more information, but it is very likely that this could lead to competition between chip manufacturers, or worse : customers being happy.
reply
News Report
The big chip making company, Intel, is in trouble. It has been accused of innovating.
We've interviewed the CEO, who told us We didn't do anything ! Why would we do that ?
Yet there are a lot of evidence that clearly points to Intel trying to innovate.
A complete 180 from their usual ethics, which can be summed up by Avoid any comparison, and remember to don't move: the customer's vision is based on movement .
We will have to wait for more information, but it is very likely that this could lead to competition between chip manufacturers, or worse : customers being happy.
reply
itech
American computer science always improves when the US has foreign policy setbacks. E.g. in 1975 Saigon and Phnom Penh both fell to murderous extremists but on the upside, we got the classic 6502, the MIT Altair 8800, and the start of the microprocessor era. Now Kabul has fallen to murderous extremists and we get a new microarchitecture from Intel. I guess when Taipei falls we'll get a similar microarchitecture, but unfortunately, we'll have to rely on the murderous extremists to build chips based on it and sell them to us.
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American computer science always improves when the US has foreign policy setbacks. E.g. in 1975 Saigon and Phnom Penh both fell to murderous extremists but on the upside, we got the classic 6502, the MIT Altair 8800, and the start of the microprocessor era. Now Kabul has fallen to murderous extremists and we get a new microarchitecture from Intel. I guess when Taipei falls we'll get a similar microarchitecture, but unfortunately, we'll have to rely on the murderous extremists to build chips based on it and sell them to us.
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Cardinal
I'm not sure if this is explained in video, but Type 4 HDI refers to a High Density Interconnect PCB that has a passive material in the center of the substrate used almost exclusively for thermal dissipation. I'm not sure about the state of the industry and how common the practice is with laptop vendors, but its a 9 watt CPU with a small integrated cooling system (What I don't know is how much heat the PCB alone can dissipate). Just for next-gen superthin laptops.
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I'm not sure if this is explained in video, but Type 4 HDI refers to a High Density Interconnect PCB that has a passive material in the center of the substrate used almost exclusively for thermal dissipation. I'm not sure about the state of the industry and how common the practice is with laptop vendors, but its a 9 watt CPU with a small integrated cooling system (What I don't know is how much heat the PCB alone can dissipate). Just for next-gen superthin laptops.
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Skywalker
The good thing is, big core has a massive 6-way instruction decoder array. Should be the largest ever seen in x86. AMD is still stuck at 4-way decode. Also there is an extra ALU and a loader and some gadgets like FADD. Not nearly a Netburst to Core level improvement(My estimate is about HSW to SKL) but will still make short work of anything AMD has, given they don't mess up something else, or running something that's cache bound only like CPUZ benchmark.
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The good thing is, big core has a massive 6-way instruction decoder array. Should be the largest ever seen in x86. AMD is still stuck at 4-way decode. Also there is an extra ALU and a loader and some gadgets like FADD. Not nearly a Netburst to Core level improvement(My estimate is about HSW to SKL) but will still make short work of anything AMD has, given they don't mess up something else, or running something that's cache bound only like CPUZ benchmark.
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Zetty_master
On P vs E core scheduling: since Linux already runs on arm cpus (well, socs, but you get the idea) that follow a BIG.little (i think that was the branding?) architecture (which is the exact same type of thing that intel is trying to do) i expect it to go over relatively smoothly. also since thread scheduling seems way better (for my pc at least) on linux im not as concerned with it as i am with windows. i can already smell the BSODs.
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On P vs E core scheduling: since Linux already runs on arm cpus (well, socs, but you get the idea) that follow a BIG.little (i think that was the branding?) architecture (which is the exact same type of thing that intel is trying to do) i expect it to go over relatively smoothly. also since thread scheduling seems way better (for my pc at least) on linux im not as concerned with it as i am with windows. i can already smell the BSODs.
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